AMD’s next data center accelerator is the Instinct MI300, which is reportedly going to release many different variants. Says Tom from the YouTube channel Moore’s Law is Dead, who as usual has the necessary information from his industry sources. He says that an interesting design philosophy consisting of several layers is followed.
The bottom layer is largely occupied by a massive 2750 square millimeter vehicle. On top of that are placed 6nm tiles housing the I/O controllers and possibly the cache. These are from about 320 to 360 mm2nd per unit. Two 5nm compute dies can be accommodated in each of these dies, and connections are available for two hbm3 memory stacks.
Calculation dies are about 110 mm2nd and each connected by 20,000 connections. That’s double the amount Apple uses for connections between the M1 Ultra’s two chips. There will be different versions optimized for specific tasks.
A passing mid-range version consists of two 6nm dies, four 5nm dies, and four hbm stacks. The top model can contain up to four basic dies, eight calculation dies, and eight hbm stencils. Considering that a 6nm die set with two 5nm dies consumes about 150 watts, the power consumption can increase to 600W. Performance levels are not yet known, but given the bandwidth and number of dies, Tom says the MI250X could double its speed.
Source: TweakTown
Source: Hardware Info
