Compared to 5nm chips, these chips offer 45% lower power consumption, are 16% smaller, and deliver 23% faster performance.
The days of 5nm chips are almost numbered as today Samsung announced the start of production of 3nm chips.
The new, smaller and more efficient chips are based on Samsung’s Gate-All-Around (GAA) transistor architecture and multi-channel FETs. Previous generations of chips were based on side fin addition (FinFET), but MBCFET is shifting to vertically stackable nanosheet transistors.
This provides a number of benefits, including the ability to continue using FinFET fabrication tools and methodology, no additional area required to increase speed due to vertical stacking, and an improved on/off mode, allowing Samsung reduce the operating voltage.
Samsung says that compared to the 5nm process, the first-generation 3nm chips can reduce power consumption by up to 45%, improve performance by 23%, and reduce the required area by 16%. The second generation of Samsung’s 3nm process will bring even higher gains of 50%, 30% and 35% respectively.
Samsung has not announced who the first buyers of its 3nm chips will be, but it is likely that they will be in the company’s own mobile devices soon. For now, Samsung’s main competitor TSMC is still focused on making 5nm chips, with 3nm chips only coming later this year, with 2nm chips scheduled for 2025. So Samsung appears to have a lead for at least a few months.
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Source: IXBT
